P-Type Polar Transition of Chemically Doped Multilayer MoS2 Transistor




A high-performance multilayer MoS2 p-type field-effect transistor is realized via controllable chemical doping, which shows an excellent on/off ratio of 109 and a maximum hole mobility of 132 cm2 V−1 s−1 at 133 K. The developed technique will enable 2D materials to be used for future high-efficiency and low-power semiconductor device applications.

1 Introduction

Over the past few years, two-dimensional (2D) transition-metal dichalcogenides (TMDs) have attracted enormous attention due to their unique material properties and potential applications in various electronic, optical, and spintronic devices;[1-6] however, integration of n-type and p-type field-effect transistors (NFETs and PFETs) needs to be developed to enable complementary device operations using TMD. Several methods, including metal work-function engineering, chemical doping, electrostatic doping, and ionic gating, have been tested for their utility in achieving bipolar carrier conduction in TMD.[7-10] These experiments were mostly carried out using 2D tungsten diselenide (WSe2), in which the Fermi level lies in the middle of the band gap and no pinning occurs at the metal–WSe2 interface, enabling relatively easy tuning of polarity.[8] Molybdenum disulfide (MoS2) is widely studied as a typical 2D semiconductor, however, elemental metals, including high work function metals, such as Pd, Ni, and Au, give rise to n-type MoS2 transistor properties when used as source and drain contacts.[11-13] Most studies have ascribed the stubborn n-type behavior to Fermi level pinning at the metal–MoS2 interface.[14-16] The employment of a high work function MoOx material as a hole injection layer at the contact interface was reported to successfully provide a MoS2 PFET;[17] however, ultra-high vacuum conditions and high temperatures are needed for the deposition of MoOx, and the on-current density (Ion) of the fabricated MoS2 PFETs was low. As the drain bias (Vd) or gate bias (Vg) increased, the electron current appeared to increase, yielding slight ambipolar behavior. Other studies have tested the utility of Nb as a substitutive dopant introduced into both mechanically exfoliated and chemical vapor deposition (CVD)-grown MoS2 flakes, yielding a high off-current (Ioff)[18, 19] or degenerate doping.[20] Researchers reported a high ambipolar conductivity in MoS2 using ion gel-gated MoS2 transistors, but the on/off ratio was only the order of 102.[21] The mechanism underlying the polar transition in MoS2 needs to be explored so that simple controllable methods for achieving high-performance MoS2 PFETs may be developed.[22]

2 Results and Discussion

Figure 1a shows a schematic diagram of our device whereas the optical microscopy image of the device is shown in the inset of Figure 1b. The flake thickness was 10 nm. The transfer curves collected from the MoS2 FET before and after doping are plotted in Figure 1b at Vd of 0.1 and −0.1 V, respectively. The pristine device displayed typical n-type behavior, as reported previously for most of the MoS2 devices contacted with Pd or Au electrodes.[11, 13] After the 5 × 10−3 m gold chloride (AuCl3) doping step (see experimental section for the details), the transfer characteristic of the device changed to yield p-type characteristics with a low Ioff of 10–13 A and a high Ion on the order of μA. The on/off ratio reached 107, 100 times the value reported for MoS2 PFETs, due to the high work function of MoOx, as described in ref. [17]. Under a high applied VdIon continued to increase whereas Ioff remained constant, as shown in Figure S1 in the Supporting Information. The output curves of the pristine NFET and doped PFET are plotted in Figure 1c. The drain current (Id) was normalized by the channel width (W), which was 2 μm (the channel length (L) was 1 μm in our device). The current density in the PFET exceeded 20 μA μm−1, two orders higher than that of reported in ref. [17]. Even if we consider the small channel length in our device, the normalized current density with respect to the channel dimensions (IdL/W) still represents the highest value yet reported among non-degenerate MoS2 PFETs.[17, 18, 23] Our MoS2 PFET displayed Ohmic-like contact, as indicated by the linearity of the output curve shown in Figure 1c. The field-effect mobilities of both the pristine NFET and the doped PFET were obtained from the transfer curves and are plotted with respect to Vg in Figure 1d. The highest hole mobility achieved in the doped PFETs was 68 cm2 V−1 s−1, whereas the electron mobility for its pristine NFET was 38 cm2 V−1 s−1. Comparable hole and electron mobilities indicated that this material is suitable for use in high-performance complementary circuits.

Figure 1.

Characteristics of a pristine n-type MoS2 transistor and an AuCl3-doped p-type device. a) Schematic diagram showing our MoS2 device and the chemical doping method. b) Logarithmic scale transfer curves collected from an n-type MoS2 device and its p-type transfer characteristics after AuCl3 doping at Vd = 0.1 V. The inset shows an optical microscopy image of the device. c) Output curves collected from the device before and after AuCl3 doping. d) Extracted field-effect mobility as a function of Vg in a pristine n-type device or a doped p-type device.

The charge transport mechanism of our device and its transition to PFET is explained with the help of carrier injection models, i.e., tunneling and thermionic emission.[24-26] The characteristics of thermionic emission (Schottky emission) and tunneling are discussed in detail in Section S2 of the Supporting Information. Figure 2a shows the carrier transport path in a pristine MoS2 NFET in which electrons injected from a metal electrode enter the MoS2 sheet beneath the metal electrode first and are then transported to the channel. The graded color in the channel indicates varying carrier densities in different MoS2 layers under gate modulation,[27] while the deep red color represents high carrier density. The Schottky barrier height associated with the Pd–MoS2 contact interface has been reported to be 0.4 eV for electrons.[11] Schottky emission was found to be the main transport mechanism at subthreshold region (−5 V) proven by linear fitting in Figure 2b with corresponding band diagram shown in inset. At high Vg of 15 V, Fowler–Nordheim (F–N) tunneling was expected to dominate due to thinner barrier as shown in inset of Figure 2c. However, the fitting in Figure 2c agreed with direct tunneling (DT). This kind of anomaly arises in devices having a small contact resistance (Rc) since they show linear output characteristics. If Rc is a small fraction of the total resistance (Rtot), the sheet resistance (Rs) of the channel forms the largest contribution to Rtot (Rtot= 2Rc + Rs),[28] and the device behaves as a simple resistor with a linear output curve, as shown in Figure S3b in the Supporting Information. The output curves at other Vg are presented in Figure S3 in the Supporting Information. In short, the electrons are injected from Pd electrode to MoS2 channel via thermionic emission in subthreshold region and they follow F–N tunneling at high Vg mainly due to thinning of interfacial barrier. These behaviors may be understood to be the switching mechanism in a Pd-contacted n-type MoS2 transistor.

Figure 2.

Switching mechanism underlying the pristine MoS2 NFET and AuCl3 doped PFET operation. a and d) Schematic diagrams of the carrier transport path in a pristine n-type transistor and a doped p-type transistor, the graded color indicates different carrier concentrations under gate modulation and chemical doping. b,c) Schottky emission fits and direct tunneling fits to the output curves collected from a pristine n-type transistor in the subthreshold regime or in the high positive Vg regime, respectively. The corresponding band diagrams are shown in the inset. e,f) The F–N tunneling fits and the direct tunneling fits for output curves collected from a doped p-type device in the subthreshold regime and in the high negative Vg regime, respectively. The corresponding band diagrams are shown in the inset.

Our doped MoS2 PFET displayed a comparable or even better performance than the pristine NFET. The hole transport paths are described in Figure 2d, where the deep red color of top layers in the channel represents doping induced high hole concentration. The readers should note that the doping depth is in the range of 1.5–3 nm.[29] We inferred that holes were transported directly to the doped channel, that were extended slightly into the MoS2 sheet beneath the metal contacts. Otherwise, a large potential difference will exist between the pristine n-type sheet beneath the metal contacts and the doped p-type channel, and this will induce an ultra-high Rc for hole transport. It was reasonable to assume that the dopant diffused into the MoS2 sheet beneath the metals since annealing was performed soon after coating the dopant. As the doped top layers had much higher hole density than the pristine n-type bottom layers, they would dominate the overall current of the MoS2 PFET device. The gate-dependent transfer curve can be observed due to the finite thickness of our flake (comparable to the charge screening length of MoS2[30]) and the non-degenerate doping concentration (will be discussed later). Bottom layers may also contribute to the hole current, however high negative Vg was needed to tune the electron rich layers to hole rich one. The output curves of the doped MoS2 PFET were measured and analyzed at a subthreshold gate bias (−2.5 V) and a high negative Vg of −15 V, as shown in Figures 2e,f respectively. Interestingly, we observed F–N tunneling at Vg = −2.5 V and DT at Vg = −15 V to be the dominant transport mechanism for hole current. It should be noted that the hole transport mechanism in the subthreshold regime is quite different from the electron transport mechanism in the same regime. Although, AuCl3 doping induced hole carriers shifted the Fermi level of MoS2 from the conduction band towards the valence band but the Pd Fermi level still lay on the top half of the MoS2 band, inducing a triangularly shaped large Schottky barrier for holes along their interface, as shown in the inset of Figure 2e. Holes could only pass through this barrier at a high Vd when F–N tunneling was significantly activated, as shown in Figure S3c in the Supporting Information. As the negative Vg increases, the barriers thin, and Rcreduces, as the result we observed DT, similar to that observed for electrons at high Vg region. The corresponding band diagram is shown in the inset of Figure 2f. In brief, MoS2 PFET formed due to the reduction of both Rc and Rs for hole transport, i.e., reduced Rc enabled the initial polar transition from n-type to p-type, while Rs limited the final Ion.

The above explanation was corroborated by calculating Rc and Rs before and after doping in a similar thickness (8 nm) device using transfer length method (TLM). An optical microscopy image of the fabricated TLM patterned device is shown in the inset of Figure 3b. The channel lengths were 0.6, 1.2, 1.8, and 2.0 μm, and the channel width was 1.3 μm. Prior to doping, the pristine TLM device was characterized as having an Rc = 7.2 kΩ μm (see Figure S4a, Supporting Information). We next doped this device with 5 × 10−3 m AuCl3 using the same method described in the experimental section to successfully obtain a MoS2 PFET, which yielded a performance comparable to previously doped 10 nm device. These results confirmed that the dopant could be controlled with good reproducibility using our method. The transfer curves measured in the doped MoS2 PFET are shown in Figure 3a. The Rc of these MoS2 PFETs was calculated to be 2.3 kΩ μm, comparable to 1.8 kΩ μm obtained from a Ti contact in an n-type MoS2 device,[31] while Ti is thought to be an Ohmic contact metal for MoS2 NFET. The gate-dependent Rc and Rs values obtained from the doped MoS2 PFET are plotted in Figure 3b. Rc and Rs dominated Rtot at small and high negative Vg respectively, consistent with our above hypothesis. (See Figure S4b in the Supporting Information, which describes the results obtained from the pristine NFET).

Figure 3.

TLM device and low-temperature measurements. a) Transfer curves collected from the TLM-patterned devices prepared with various channel lengths. Vd was 1.0 V. The inset shows a plot of Rtot versus the channel length for the calculated Rc value. b) The gate bias-dependent Rc and Rs values. The inset shows an optical microscopy image of the TLM device. c) The temperature dependence of the transfer curves for a doped MoS2 PFET. The output curves at 133 K are shown in the inset. d) Logarithmic-scale transfer curves collected from the doped PFET at room temperature or at 133 K. e) Temperature-dependent mobility of a PFET and the electron–phonon scattering fit.

Low-temperature measurements were carried out on a 10 nm thick 2 terminal MoS2 PFET device. The temperature-dependent transfer curves are shown in Figure 3c. Generally, the device current mainly depends on Rs and Rc, i.e., Id = Vd/(2Rc + Rs), and these both resistances have different sensitivities to temperature. Rs is limited by electron-phonon scattering and therefore it decreases as temperature falls. On the other hand, Rc either has a very weak temperature dependence or becomes higher when the temperature is lowered due to F–N tunneling or thermionic emission respectively.[32] The increasing trend of Id with lowering temperature confirmed that Rsdominated hole transport in our doped MoS2 PFET under relatively high negative Vg. The inset of Figure 3c shows the output curve measured at 133 K, in which the linear and symmetric characteristics indicated Ohmic-like behavior. These results suggested a small Rc at the metal–MoS2interface in our doped MoS2 PFET. The transfer curves measured at 296 (room temperature) and 133 K are plotted in Figure 3d, The on/off ratio increased to 109 at 133 K and was two orders higher than the room temperature result of 107. The increase in Ion was attributed to reduced phonon scattering at lower temperatures, whereas the Ioff reduction was attributed to a decrease in the gate leakage. We noticed that the n-type branch appeared at lower temperatures. The origin of electron current was studied in detail in Figure S5 in the Supporting Information. Next, we calculated the hole mobilities at various temperatures as shown in Figure 3e. The mobilities were obtained at relatively high negative Vg, in which case Rc became negligible, and thus the 2-probe measurements can be applied to get reliable mobility values. The mobility clearly increased as the temperature decreased, and a peak mobility of 132 cm2 V−1 s−1 was reached at 133 K. These results indicated phonon scattering, which could be fit to μ ≈ Tγ, where the exponent γ was equal to 0.7 for our device.[33] To the best of our knowledge, this is the first reported indication of intrinsic hole transport in an MoS2 PFET, independent of Rc. We understand that, besides Rc there can be cases that lead to incorrect mobility estimation. For example, graded carrier concentration in vertical direction induced by both gating and chemical doping may make our device system complicated,[4, 34-36] and this cannot be addressed by using the conventional field-effect equation. More studies are required in the future to address the mobility issue related to multilayered 2D materials showing graded carrier concentration.

Since Rc limited the polar transition of MoS2 from NFET to PFET, contact engineering efforts aimed at reducing Rc were implemented for achieving high-performance MoS2 PFETs. Here, we applied a graphene buffer layer at Pd-MoS2 interface, expecting to induce hole injection layer for MoS2 since high work function of graphene is formed after AuCl3 doping[37, 38] and graphene work function can be further increased by effective gating.[39] A schematic diagram of the MoS2 transistor prepared with a graphene buffer layer is shown in Figure 4a. After exfoliation of the MoS2 flake (7 nm) onto a 50 nm SiO2/Si substrate, two separate thin strips of graphene sheets were stacked onto the surface of the MoS2 flake to form electrodes using the transfer method.[40] Next, a 20 nm Pd layer and a 40 nm Au layer were deposited onto the graphene sheets. Graphene thickness was measured to be 2 nm by atomic force microscopy (AFM) (Figure S6, Supporting Information). An optical microscopy image of the fabricated device is shown in the inset of Figure 4b. Our Gr/Pd/Au contacted device resulted in normal MoS2 NFET that is consistent with the previous study.[41] The transfer curves of Gr/Pd/Au contacted device before and after doping were shown in Figure 4b. The current was normalized to the channel dimension. Normalized Ion for the device prepared with a graphene buffer layer after doping was nearly equal to the value measured in the device prepared without a graphene buffer layer. This further strengthens our previous conclusion that Ion is limited by Rs, because the doping concentrations were equal in both devices and therefore Rs and Ionwere similar as well. The field-effect hole mobility was calculated to be 72 cm2 V−1 s−1.

Figure 4.

Graphene buffer layer. a) Schematic diagram showing the MoS2 FET prepared with a graphene buffer layer. b) Transfer curve of the device before and after doping. The inset shows the optical microscopy image of this device. c) The black line shows the transfer curve of a pristine MoS2 device prepared with Pd/Au contacts. The red and green lines show the device performances after doping with 5 or 20 × 10−3 m AuCl3 dopants, respectively, after annealing at 100 °C for 10 min. The blue line shows the transfer curve of a MoS2 device prepared with a graphene buffer layer doped with 5 × 10−3 m AuCl3 dopant at 100 °C for 10 min. The linear scale transfer curves are shown in the inset. d) Schematic diagram of an MoS2 device prepared with a highly doped contact and a metal-covered channel. e) Transfer characteristics of the channel-covered device before and after doping. The inset shows the optical microscopy image. f) Fermi level shift after chemical doping. All results were obtained at room temperature.

For the exploration of the superiority of graphene buffer layer in the respect of Rc, the effect of Rsmust be excluded. Thus, we performed high concentration doping in devices with and without graphene buffer layer on the same flake (see Figure S6c, Supporting Information for the optical microscopy image). The flake thickness is 11 nm. Annealing at 100 °C for 10 min was proven to result in high doping concentration for MoS2 based on the doping test experiment in Figure S7 in the Supporting Information. The red and green curves shown in Figure 4c present the normalized transfer curves of the device without graphene buffer layer doped by 5 and 20 × 10−3 m dopants and annealed at 100 °C for 10 min respectively. The device doped by 20 × 10−3 m AuCl3 provided a higher current than that of 5 × 10−3 m; however, both transfer curves showed slight gate dependence. We next plotted the transfer curve (blue curve) of the counterpart device prepared with a graphene buffer layer doped with 5 × 10−3 m AuCl3 and annealed at 100 °C for 10 min for comparison. A high current density and almost no gate dependence were observed in this device. The only difference between these two devices was the contact interface. As discussed earlier, Rc dominated the total resistance of the device with highly doped channel. The graphene buffer layer provided high hole concentration at the contact interface after doping and the downward shift of its Fermi level reduced the Schottky barrier height for holes, lowering Rc. Thus higher performance degenerate MoS2 PFET was observed in Gr/Pd/Au contacted device. The current level in these doped devices was best visualized on a linear scale, as shown in the inset of Figure 4c.

We employed a graphene buffer layer and applied high-concentration doping to a device (9 nm) with a channel covered by 20/40 nm Pd/Au. The device schematic and its optical microscopy image are shown in Figure 4d and the inset of Figure 4e respectively. By covering the large part of the channel with metal, Rs remained large while Rc became relatively negligible after doping. Therefore, Rtot for this device was mainly determined by the metal-covered part of the channel. The transfer curve of this device after doping, as shown in Figure 4e, revealed hole dominated ambipolar behavior with hole current lower than the directly doped device and a wide voltage range of off-state under gate modulation. The hole-dominated conduction confirmed that reducing Rc for holes can switch the MoS2 transistor from n-type to p-type. The low hole current however indicated that Rs for holes cannot reach a sufficiently small value simply by gate modulation. The inherently high electron concentration in MoS2 is also a stumbling block for achieving high-performance MoS2 PFET after figuring out the Rc issue. Other devices prepared with a channel covering have displayed similar ambipolar behaviors with enhanced electron current due to the lack of graphene buffer layer, as shown in Figure S8 in the Supporting Information. In addition to these, we also calculated the Fermi level shift in our device after non-degenerate and degenerate doping by a AuCl3 dopant for reference in Figure 4f. The Fermi level was found to be 0.14 eV above the valence band and 0.13 eV below the valence band respectively. The calculation method is demonstrated in Section S9 of the Supporting Information. A comparison of MoS2 PFET performances using our doping method and other methods in the literature is summarized in Table 1.

Table 1. Comparison of MoS2 PFET performances enabled by different methods
A. Non-degenerate doping
Non-degenerate dopingCarrier density [cm−2]Mobility [cm2 V−1s−1]On-current density [μA μm−1]On/off ratioContact resistance [kΩ μm]Device thickness [nm]
This work1.5 × 101268–132211072.37–11
Plasma doping (ref. [23])–110020–25
MoOx buffer layer (ref. [17])0.1310440
Nb doping (ref. [18])≈10126.7≈110418–20
B. Degenerate doping
Degenerate doping  Carrier density [cm−2] Device thickness [nm]
This work  5.0 × 1013 8
Nb doping (ref. [20])  1.8 × 1014 61
NO2 doping (on WSe2, ref. [8])  2.2 × 1012 – 2.5 × 1012 ≈0.7

Complementary device applications were explored by integrating our NFET and doped PFET through wire bonding. The device schematic and corresponding electric circuits are shown in Figure 5a,b respectively (see Figure S10, Supporting Information for the optical microscopy image of the device). A back gate was applied as the input voltage (Vin) and the supply voltage (Vdd) was applied to the PFET. Figure 5c shows the voltage transfer characteristics of the MoS2 inverter at different Vdd. Clear signal inversion is observed with high output voltage (Vout ) and low Vin and vice versa. The dc voltage gain (g = ∂Vout/∂Vin) was calculated and shown in Figure 5d.

Figure 5.

MoS2 inverter. a) Schematic diagram of a MoS2 inverter. MoS2 PFET was prepared by chemical doping. PFET and NFET were connected by wire bonding. b) Electric circuit of the MoS2 inverter. c) Voltage-transfer characteristics of the MoS2 CMOS inverter at differentVdd. d) Direct-current voltage gain of the inverter at Vdd = 2.0 V.

3 Conclusion

We have demonstrated that, for MoS2 as an intrinsically strong n-type semiconductor, contact engineering alone did not yield a high-performance MoS2 PFET, but doping or effective channel gating was needed to improve the device performance. The introduction of a graphene buffer layer was able to reduce Rc for holes. A controllable chemical doping method was used to prepare high-performance MoS2 PFETs with a room-temperature hole mobility of 72 cm2 V−1 s−1 (132 cm2 V−1 s−1at 133 K), an on/off ratio exceeding 107, and a low Rc of 2.3 kΩ μm. We successfully demonstrated a MoS2 CMOS inverter based on the pristine NFET and chemically doped PFET, showing the great potential of our controllable chemical doping method in the application of complementary electronic devices.

4 Experimental Section

Multilayer MoS2 prepared using the mechanical exfoliation method was positioned on a highly doped p–Si substrate capped with 50 nm thermally oxidized SiO2. 20/40 nm Pd/Au was then deposited onto the MoS2 flake to form the source and drain contacts using an electron beam evaporator. Conventional AuCl3 was used in this study as a p-type dopant[34, 42, 43] of MoS2 to prepare a range of doping concentrations. The AuCl3 dopant was prepared using a Schlenk line, and all operations related to the AuCl3 powder or dopant were performed in a glove box to protect the reagents from the air environment. The 5 × 10−3 m AuCl3 dopant was spin-coated at 5500 rpm for 1 min over MoS2 sample and the sample was then baked at 50 °C for 5 min to get optimized non-degenerate MoS2 PFET. The device performances before and immediately following doping were characterized through electrical measurements and compared. The thickness of the MoS2 flakes (see Figure S11, Supporting Information) used in this work was around 7–11 nm measured by AFM, and the channel length of the fabricated devices was 0.6–2 μm.


X.L. and D.Q. contributed equally to this work. This work was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) (2013R1A2A2A01015516), and by the Global Frontier R&D Program (2013M3A6B1078873) at the Center for Hybrid Interface Materials (HIM), funded by the Ministry of Science, ICT & Future Planning.